For an embedded microcontroller (MCU) system, because cache memory (e.g. static random access memory (SRAM)) is expensive, a large/slower/higher power memory such as dynamic random access memory (DRAM) is generally used with the cache to provide large memory space; however, this arrangement costs much power consumption. Furthermore, regarding the cache technique, a hardware cache implementation needs higher costs, and a pure software cache costs power and computing resources. Therefore, how to provide a memory management method to have lower cost and lower power consumption is an important topic.